Direct epitaxial integration of III-V optoelectronic devices on Si offers a substantial manufacturing cost and scalability advantage over heterogeneous integration via wafer bonding. The challenge in utilizing direct epitaxy of III-Vs on Si is that: epitaxial growth introduces high densities of crystalline defects that limit device performance and lifetime, the use of miscut Si substrates to avoid antiphase boundary (APB) formation would hamper full compatibility with CMOS processing. In our recent work, by using QDs as an optical gain medium, the efficient capture and three-dimensional confinement of injected carriers by the individual dots lead to much reduced nonradiative recombination rates. By switching from the miscut Si substrates towards (001) Si substrates that are standard in microelectronics fabrication, full compatibility with the prevailing Si CMOS manufacturing processes was realized. By light confinement in small volumes with resonant recirculation, the dense, energetically confined, and spatially isolated QD gain medium complement the rise of Si photonics by populating these chips with small-footprint and low-threshold light sources. Robust CW operation at 80 °C has been demonstrated where minimum degradation after more than 4000 h of constant current stress was demonstrated, with an extrapolated lifetime of over 22 years. With lifetimes entering the realm of commercial relevance, monolithic integration promises to scale photonic integrated circuits to 300 mm or even 450 mm diameter wafer size for high volume applications. However, fully integrated photonic circuits and device integration with other advanced silicon-based photonic components is still in initial stages. Our work focus is for active-passive coupling and co-integration in future research.
Please check our recent front cover paper published in ACS Photonics
C. Shang#, Y. Wan#, J. Selvidge, E. Hugues, R. Herrick, K. Mukherjee, J. Duan, F. Grillot, W. W. Chow, A. C. Gossard, and J. E. Bowers*, “Perspectives on advances in quantum dot lasers and integration with Si photonic integrated circuits”, ACS Photonics 8 (9), 2555-2566, 2021