Negative Capacitance and Its Potential Use for Next Generation Computing Technology
- Prof. Sayeef Salahuddin, Electrical Engineering and Computer Sciences, University of California Berkeley
B9 L3 R3125
Power constraint has become a critical challenge for computing, restricting the rate at which data can be processed. The physics of ordered and correlated systems allow for fundamental improvement of the energy efficiency in this regard, going beyond what is possible with conventional materials in today’s computing hardware. One such example is the the ferroelectric materials, where thermodynamics dictate that charge can be switched with much lower energy compared to conventional dielectrics. This leads to a situation where a ferroelectric material can be stabilized at a state of negative capacitance. In this talk, I shall discuss our experimental work demonstrating the stabilization of negative capacitance, its integration into advanced transistors, and its potential impact on next generation computing hardware.
Overview
Abstract
Power constraint has become a critical challenge for computing, restricting the rate at which data can be processed. The physics of ordered and correlated systems allow for fundamental improvement of the energy efficiency in this regard, going beyond what is possible with conventional materials in today’s computing hardware. One such example is the the ferroelectric materials, where thermodynamics dictate that charge can be switched with much lower energy compared to conventional dielectrics. This leads to a situation where a ferroelectric material can be stabilized at a state of negative capacitance. In this talk, I shall discuss our experimental work demonstrating the stabilization of negative capacitance, its integration into advanced transistors, and its potential impact on next generation computing hardware.
Brief Biography
Sayeef Salahuddin is a TSMC Distinguished professor of Electrical Engineering and Computer Sciences at the University of California Berkeley. His work has focused mostly on conceptualization and exploration of novel device physics for low power electronic and spintronic devices. Salahuddin has received the Presidential Early Career Award for Scientist and Engineers (PECASE). Salahuddin also received a number of other awards including the NSF CAREER award, the IEEE Nanotechnology Early Career Award, the Young Investigator Awards from the Air Force Office of Scientific Research (AFOSR) and the Army Research Office (ARO) and best paper awards from IEEE Transactions on VLSI Systems and from the VLSI-TSA conference. Salahuddin is a co-director of the Berkeley Device Modeling Center (BDMC) and Berkeley Center for Negative Capacitance Transistors (BCNCT). Salahuddin is also a co-director of ASCENT, one of the six centers of the JUMP initiative sponsored by SRC/DARPA. He served on the editorial board of IEEE Electron Devices Letters (2013-16) and was the chair the IEEE Electron Devices Society committee on Nanotechnology (2014-16). Salahuddin is a Fellow of IEEE