My research focuses on designing efficient interfaces between the analog and digital domains through the development of low-power, high-performance CMOS interface circuits. The interface circuit encompasses key components such as amplifiers, filters, comparators, analog-to-digital converters (ADCs), each of which must be carefully optimized to meet the specific requirements of the target application. By addressing the challenges in analog-digital interfacing, this work aims to contribute to the advancement of integrated circuits and systems that can seamlessly connect real-world analog signals to their digital counterparts, with potential applications in sensor interfaces, data acquisition systems, and mixed-signal electronics. The research involves circuit design, simulation, integration, and experimental evaluation to create novel interface circuit topologies and techniques that improve power efficiency, speed, and overall performance.
Biography
Abdullah Alshehri is a Ph.D. candidate in the Electrical and Computer Engineering (ECE) department at the Integrated Circuit and System (ICS) Research Group at King Abdullah University of Science and Technology (KAUST).
Alshehri received his Bachelor of Science degree in Electrical and Electronics Engineering from the University of Brighton in the United Kingdom in 2014. In 2016, he earned his master's degree in Electrical Engineering (Electro-physics) from KAUST in Saudi Arabia.
Alshehri's research focuses on designing low-power, high-speed CMOS interface circuits for sensors. He has published over 10 papers and obtained a patent. Throughout his academic and professional journey, Alshehri has gained valuable experience from positions at companies such as STC, Digital Network, ARAMCO, SEMC, Umm Al Qura University, and KAUST.
Research Interests
Abdullah's research interests focus on the design of low-power, high-performance interface circuits for advanced applications. Specific areas of focus include:
- Low-power, high-speed CMOS interface circuit design:
- Developing energy-efficient amplifiers, filters, and other analog building blocks
- Optimizing circuit topologies and techniques to improve power, speed, and linearity
- High-performance analog comparators:
- Designing low-offset, low-noise comparator circuits
- Enhancing comparator speed and resolution for precision applications
- Energy-efficient digital logic circuits:
- Implementing compact, low-power digital logic blocks and controllers
- Exploring circuit techniques to minimize dynamic and static power consumption
- High-speed, low-power analog-to-digital converters (ADCs):
- Advancing ADC architectures and circuit designs to improve power consumption and conversion rates
- Reducing the design complexity of high-performance ADC
Professional Profile
Service Contributions
- Service to the Institution
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Orientation Leader with KAUST Graduate Affairs, 2015 - present
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- Public Outreach
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Student Panelist, 2021 - 2024
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KAUST Ambassador , 2022 - present
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Awards and Distinctions
- Selected among the 10 best projects to win 100,000 SAR funding "Combating COVID-19 Accelerator" awards offering the best solutions to tackle COVID-19, KACST , 2020
- Best Ph.D. Forum Award for the paper "A High-Speed Dynamic StrongARM Comparator", MWSCAS Symposium, 2018
- 2nd place on Synopsys Olympiad in Saudi Arabia, Synopsys Software Company, 2015
- Honour Reward, Saudi Arabian Cultural Mission in the United Kingdom, 2013
- Winner of the Invensys Eurotherm prize for the Best Team Performance, University of Brighton, 2013
- Honour Reward, Saudi Arabian Cultural Mission in the United Kingdom, 2012
Professional Memberships
- Graduate Student Member, IEEE, 2018 - 2024
- Mentor, Medvation, 2024
Qualifications
Education
- Master of Engineering (MEng)
- Electrical and Computer Engineering, King Abdullah University of Science and Technology (KAUST), Saudi Arabia, 2016
- Bachelor of Engineering (B.Eng.)
- Electrical and Electronic Engineering, University of Brighton, United Kingdom, 2014
- Arabic
- Native or bilingual proficiency
- English
- Elementary proficiency, understand, read, write, speak
Languages
Related Media
Selected Publications
- Alshehri, A. ., Salama, K. ., & Fariborzi, H. . (2024). A 19 fJ/op, Low-Offset StrongARM Latch Comparator for Low-Power High-Speed Applications. ISCAS 2024. Presented at the. Singapore: IEEE. (Original work published 2024)
- Alshehri, A. ., Alqarni, A. ., Yang, K. ., & Fariborzi, H. . (2023). A 270 fJ/op 5.8 GHz MOS Current Mode Logic D- Latch for High-Speed Application. Prime 2023. Presented at the. Institute of Electrical and Electronics Engineers (IEEE). https://doi.org/10.1109/prime58259.2023.10161769 (Original work published 2023)
- Al-Qadasi, M. ., Alshehri, A. ., Fariborzi, H. ., & Al-Attar, T. . (2022). Successive approximation tree configuration for analog-to-digital converter. USA: US Patent Office. Retrieved from https://scholar.google.com/citations?view_op=view_citation&hl=en&user=gDK5Xx0AAAAJ&citation_for_view=gDK5Xx0AAAAJ:zYLM7Y9cAGgC
- Alshehri, A. ., & Fariborzi, H. . (2021). Power-Efficient MCML D-Latch with Cross-Coupled Transistor Load for High Speed Processors.
- Al-Qadasi, M. ., Alshehri, A. ., Alturki, A. ., Almansouri, A. ., Salama, K. ., Fariborzi, H. ., & Al-Attar, T. . (2020). Rail-to-rail complementary input StrongARM comparator for low-power applications. Retrieved from https://ietresearch.onlinelibrary.wiley.com/doi/epdf/10.1049/iet-cds.2019.0361
- Alshehri, A. ., Al-Qadasi, M. ., Almansouri, A. ., Al-Attar, T. ., & Fariborzi, H. . (2018). StrongARM Latch Comparator Performance Enhancement by Implementing Clocked Forward Body Biasing. 2018 25th IEEE International Conference on Electronics, Circuits and Systems (ICECS). Presented at the. IEEE. Retrieved from https://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=8617903 (Original work published 2018)
Related People
Academic Advisors
Hossein Fariborzi
- Adjunct Professor (former), Electrical and Computer Engineering
