About Tariq Alturkestani Tariq Alturkestani Ph.D. Student, Computer Science High Performance Computing burst buffer optimization IO Tariq is a PhD student in Computer Science working under the supervision of Professor David E. Keyes. He is working on developing a library that enables users to overlap I/O and compute. Tariq holds a Bachelors degree from Penn State University and a Master from KAUST. Education Profile MS, Computer Science, King Abdullah University of Science and Technology (KAUST), 2014. BS, Computer Science, Penn State University, USA, 2013. Events Presented Events Jul 5 - Jul 11, 2020 Maximizing I/O Bandwidth for Out-of-Core HPC Applications on Heterogeneous Large-Scale Systems Tariq Alturkestani, Ph.D. Student, Computer Science Jul 9, 16:00 - 17:00 KAUST Out-of-Core simulation systems often produce a massive amount of data that cannot fit on the aggregate fast memory of the compute nodes, and they also require to read back these data for computation. As a result, I/O data movement can be a bottleneck in large-scale simulations. Advances in memory architecture have made it feasible to integrate hierarchical storage media on large-scale systems, starting from the traditional Parallel File Systems to intermediate fast disk technologies (e.g., node-local and remote-shared NVMe and SSD-based Burst Buffers) and up to CPU’s main memory and GPU’s High Bandwidth Memory. However, while adding additional and faster storage media increases I/O bandwidth, it pressures the CPU, as it becomes responsible for managing and moving data between these layers of storage. Simulation systems are thus vulnerable to being blocked by I/O operations. The Multilayer Buffer System (MLBS) proposed in this research demonstrates a general method for overlapping I/O with computation that helps to ameliorate the strain on the processors through asynchronous access. The main idea consists in decoupling I/O operations from computational phases using dedicated hardware resources to perform expensive context switches. By continually prefetching up and down across all hardware layers of the memory/storage subsystems, MLBS transforms the original I/O-bound behavior of evaluated applications and shifts it closer to a memory-bound or compute-bound regime.
Maximizing I/O Bandwidth for Out-of-Core HPC Applications on Heterogeneous Large-Scale Systems Tariq Alturkestani, Ph.D. Student, Computer Science Jul 9, 16:00 - 17:00 KAUST Out-of-Core simulation systems often produce a massive amount of data that cannot fit on the aggregate fast memory of the compute nodes, and they also require to read back these data for computation. As a result, I/O data movement can be a bottleneck in large-scale simulations. Advances in memory architecture have made it feasible to integrate hierarchical storage media on large-scale systems, starting from the traditional Parallel File Systems to intermediate fast disk technologies (e.g., node-local and remote-shared NVMe and SSD-based Burst Buffers) and up to CPU’s main memory and GPU’s High Bandwidth Memory. However, while adding additional and faster storage media increases I/O bandwidth, it pressures the CPU, as it becomes responsible for managing and moving data between these layers of storage. Simulation systems are thus vulnerable to being blocked by I/O operations. The Multilayer Buffer System (MLBS) proposed in this research demonstrates a general method for overlapping I/O with computation that helps to ameliorate the strain on the processors through asynchronous access. The main idea consists in decoupling I/O operations from computational phases using dedicated hardware resources to perform expensive context switches. By continually prefetching up and down across all hardware layers of the memory/storage subsystems, MLBS transforms the original I/O-bound behavior of evaluated applications and shifts it closer to a memory-bound or compute-bound regime.
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