Micro-electro-mechanical (MEMs) Resonator-Based Systems for Sensing, Memory, and Computing

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Building 3, level 5, Room 5220


CMOS (Complementary Metal-Oxide-Semiconductor) technology has long held a preeminent position as the quintessential choice for constructing microprocessors. However, with the advent of MEMS (Micro-Electro-Mechanical Systems) technology, scholars and innovators are embarking on a journey where MEMS resonators transcend their traditional roles as sensory electronics and actuators to become integrated processing units. Leveraging the unique attributes of MEMS technology - compact size, minimal power consumption, and exceptional mechanical sensitivity - MEMS resonators excel in computation, data storage management, and data flow control, carving an innovative path for microprocessor technology.

Studies on traditional CMOS processor systems indicate that realizing MEMS microprocessors involves the integration of various components based on MEMS technology, including storage units, computational units, and input/output signal processing circuits. Memory units, being fundamental to the processor, play a crucial role in the design for achieving the ultimate goal of implementing integrated microprocessors using MEMS resonators. Common MEMS storage units require specialized signal processing modules to effectively control the modes and behavior of the resonators, presenting challenges to integration. We aim to explore more advanced nonlinear modulation techniques to efficiently control the nonlinear mechanical behavior of resonators for MEMS-based storage functionality, accommodating further miniaturization of device sizes and system integration.

Considering that MEMS devices typically operate at higher voltages, we customize dedicated I/O interfaces based on the operating voltage range of MEMS resonators. Hysteresis comparators, commonly used in various I/O interfaces, have not been previously reported in MEMS resonator designs. Additionally, providing a broad, adjustable threshold and hysteresis range for different application requirements remains a significant challenge. Our innovative design primarily addresses how to realize comparators with a large adjustable hysteresis range to enhance stability and noise immunity, particularly important in signal processing within noisy environments.

Computation, the core function of microprocessors, involves various logic gates and arithmetic units. To maximize the processing speed and efficiency of MEMS computation, we propose a cascaded design of logic gates as a necessary foundation for realizing computational functionality. Furthermore, we introduce an efficient data compression method based on multi-frequency operation of MEMS, utilizing a non-interconnected 7-to-3 compressor. The responsibility of this design element is to compress data into a more compact representation, thereby reducing the overall computational load and enhancing processing speed. This simplifies the complexity of multi-bit computational systems, providing a more stable and efficient computational framework.

Brief Biography

Xuecui Zou obtained a B.S. degree from the University of Electronic and Science Technology of China in 2018, followed by an M.S. degree in Computer, Electrical, and Mathematical Sciences and Engineering from KAUST Saudi Arabia in 2019. In 2023, Xuecui interned at Purdue University's Department of Electrical Engineering. Currently, pursuing a Ph.D. at KAUST under the supervision of Prof. Hossein Fariborzi and Prof. Khaled Salama, Xuecui's research focuses on applying the MEMS platform in sensing, memory, and computing.

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