About Long Qu Long Qu Research Scientist, Hierarchical Computations on Manycore Architectures seismic imaging parallel algorithms Articles Related News September 2022 Designing Tomorrow's Algorithms on Today's Architectures: a Case Study with Stencil Computations Using AMD 3D V-Cache™ Technology 2 min read · Mon, Sep 12 2022 News HPC Performance optimization seismic imaging Regular stencil computations constitute the main core kernel in many temporally explicit approaches for structured grid finite-difference, finite-volume, and finite-element discretizations of partial differential equation conservation laws. For various blocking dimensions, the Spatial Blocking (SB) approach enables data reuse within multiple cache levels. However, the straightforward generalization of SB to manycore architectures, with each core owning an exclusive share of cache may leave performance on the table. The next two figures show the typical 25-point 3D star stencil used in seismic February 2021 ECRC contributions to SIAM CSE21 4 min read · Sat, Feb 27 2021 News research conference HPC computational science and engineering ECRC @ SIAM CSE21! Follow us @KAUST_ECRC As in previous SIAM conferences on Parallel Processing (PP) and Computational Science and Engineering (CSE), ECRC members and their collaborators will have a strong presence at SIAM CSE21, nominally in Fort Worth, Texas, but held virtually due to the pandemic. ************************************************** SIAM CSE21 will run virtually with live sessions. ************************************************** Registration to SIAM CSE is required to gain access to the online platform and attend live sessions. Once registered, please use your personal
Designing Tomorrow's Algorithms on Today's Architectures: a Case Study with Stencil Computations Using AMD 3D V-Cache™ Technology 2 min read · Mon, Sep 12 2022 News HPC Performance optimization seismic imaging Regular stencil computations constitute the main core kernel in many temporally explicit approaches for structured grid finite-difference, finite-volume, and finite-element discretizations of partial differential equation conservation laws. For various blocking dimensions, the Spatial Blocking (SB) approach enables data reuse within multiple cache levels. However, the straightforward generalization of SB to manycore architectures, with each core owning an exclusive share of cache may leave performance on the table. The next two figures show the typical 25-point 3D star stencil used in seismic
ECRC contributions to SIAM CSE21 4 min read · Sat, Feb 27 2021 News research conference HPC computational science and engineering ECRC @ SIAM CSE21! Follow us @KAUST_ECRC As in previous SIAM conferences on Parallel Processing (PP) and Computational Science and Engineering (CSE), ECRC members and their collaborators will have a strong presence at SIAM CSE21, nominally in Fort Worth, Texas, but held virtually due to the pandemic. ************************************************** SIAM CSE21 will run virtually with live sessions. ************************************************** Registration to SIAM CSE is required to gain access to the online platform and attend live sessions. Once registered, please use your personal
Related Sites Hierarchical Computations on Manycore Architectures (HiCMA) Applied Mathematics and Computational Science (AMCS) Related Content Articles 2
