accelerators

Hardware Centric Quantized Convolutional Neural Network and Algorithms

Li Zhang, Ph.D. Student, Electrical and Computer Engineering

Jul 24, 09:00 - 10:00

B3 L5 R5209

machine learning accelerators FPGA

This thesis addresses the challenges of deploying quantized convolutional neural networks (QCNNs) on resource-constrained edge devices by proposing two novel hardware-software co-design frameworks: one for deriving lightweight, hardware-friendly models validated on FPGA, and another for hardware-aware mixed-precision quantization on compute-in-memory accelerators.

Exploring FPGAs for Virtualized In-Network Acceleration

Dr. Suhaib Fahmy, Associate Professor, Computer Engineering, University of Warwick, UK

Sep 24, 12:00 - 13:00

B2 B3 A0215

FPGA data centers streaming applications accelerators big data cloud computing

Abstract With increasing connectivity and reliance on machine intelligence to process ever-growing amounts of data, the question of how to arrange the required connectivity and computation arises. Traditional cloud computing approaches that centralize compute capability in a data center do not scale well to large scale distributed data sources that must then transmit data over constrained networks. Similarly, computing at the very edge of the network is often constrained by limited computational capacity and a lack of access to shared data. In-network computing has been proposed as a way of