Skip to main content
Computer, Electrical and Mathematical Sciences and Engineering
CEMSE
Computer, Electrical and Mathematical Sciences and Engineering
Home
Study
Prospective Students
Current Students
Internship Opportunities
Research
Research Overview
Research Areas
Research Groups
Programs
Applied Mathematics and Computational Science
Computer Science
Electrical and Computer Engineering
Statistics
People
All People
Faculty
Affiliate Faculty
Instructional Faculty
Research Scientists
Research Staff
Postdoctoral Fellows
Students
Alumni
Administrative Staff
News
Events
About
Who We Are
Leadership Team
Apply
ODE-based chaotic oscillator
Analysis of bus width and delay on a fully digital signum nonlinearity chaotic oscillator
1 min read ·
Wed, Apr 27 2011
News
Circuits
digital implementation
ODE-based chaotic oscillator
Abhinav Mansingka, et al., "Analysis of bus width and delay on a fully digital signum nonlinearity chaotic oscillator." In 2011 IEEE 54th International Midwest Symposium on Circuits and Systems (MWSCAS), 2011, 1. Abstract: This paper introduces the first fully digital implementation of a 3rd order ODE-based chaotic oscillator with signum nonlinearity. A threshold bus width of 12-bits for reliable chaotic behavior is observed, below which the system output becomes periodic. Beyond this threshold, the maximum Lyapunov exponent (MLE) is shown to improve up to a peak value at 16-bits and
