Our lab works on Silicon Photonics with special emphasis on integration of on-chip light sources. Leveraging the state-of-the-art nanofabrication technology and interdisciplinary cooperation, we develop photonic integrated circuits that can be applied for data communications, biosensors/bioimaging, energy harvesting, machine vision, and quantum information processing.
Please check our recent review paper discussing the prospects of QD Lasers and Integration with Si PIC.
Our invited talk at PIERS 2022 and CLEO 2022 reviewed recent stride that has been made in individuals QD devices grown on Si, and several paths to be explored for active-passive coupling and co-Integration of QD lasers to the rest parts of Si photonics.
Kindly view our introduction video (YouTube or BiliBili) to see the recent work we are doing.
The projects listed below serve as examples. Please feel free to get in touch with Prof. Yating Wan at email@example.com if you are interested in joining us (as postdocs, postgraduate students, or interns) or want to learn more about the on-going topics.
From the device-level, different routes taken in integrating on-chip lasers will be explored from different material systems to the chosen integration methodologies: monolithic integration and heterogeneous integration.
Heterogeneous integration bonds unpatterned III-V thin films to silicon wafers at the early- to mid-stages with a coarse alignment, and then define devices lithographically on the full wafer scale.
From the system-level, we plan to develop PICs with on-chip lasers for applications of communications and interconnects, OPA-based LiDAR, Bio-chemical sensors, quantum information processing and optical computing, etc.
By light confinement in small volumes with resonant recirculation, microcavity lasers promise to complement the rise of Si photonics by populating these chips with extreme small size.
Direct epitaxial integration of III-V optoelectronic devices on Si offers a substantial manufacturing cost and scalability advantage over heterogeneous integration via wafer bonding.